1. Field of the Invention
This invention relates to an improved superconductive Josephson junction logic circuit and more particularly, to a novel Josephson junction logic circuit having a high gain input.
2. Related Applications
This invention is an improvement of our co-pending applications entitled "Three Josephson Junction Direct-Coupled Isolation Circuit", U.S. Ser. No. 298,148, filed Aug. 31, 1981 and now U.S. Pat. No. 4,413,196 and "A Four Josephson Junction Direct-Coupled And Gate Circuit", U.S. Ser. No. 298,149, filed Aug. 31, 1981 and now U.S. Pat. No. 4,413,197. These applications show and describe high gain output circuits in which the output branch of the Josephson junction amplifier displays a non-linear threshold characteristic.
3. Description of the Prior Art
The prior art logic circuits employing Josephson junction devices are generally classified in U.S. Class USC 307, sub class 306 with superconductive devices. The prior art includes Josephson junction logic circuits disclosed in IEEE, International Electron Devices Meeting at Washington, D.C., Dec. 3-5, 1979 at pages 482-484. The Josephson junction logic circuits described in this article are based on direct coupled logic (DCL). The logic circuits described in this article display linear threshold characteristics.
The prior art also includes IEEE, Transaction on Magnetics Vol. 15, No. 6, Nov., 1979 at pages 1876-1879. This prior art circuit has been referred to as the Josephson Atto-Weber switch (JAWS). This logic circuit employs a two input logic driver with an extra d.c. input bias. The logic circuit shown and described in this article in FIG. 1 also displays a linear threshold characteristic at the input and the output.
Both of the above-mentioned Josephson junction logic circuits are complex and display linear threshold characteristics which limit the gain and the operating region of the devices in the output stage.
It would be desirable to further improve the gain characteristics of the aforementioned related application circuits so that they may be employed as logic module building blocks for high performance data processing applications.